1. Field
Some example embodiments of inventive concepts relate to a patterning process and more particularly a method for reducing intermixing between films of a double patterning technology (DPT) process. Some example embodiments relate to a semiconductor device manufactured by a patterning process, and more particularly to a semiconductor device manufactured by a double patterning technology (DPT) process.
2. Description of Related Art
With improvements in nano-scaling and integration of semiconductor devices, more patterns may be secured within a cell area in order to increase memory capacity. Accordingly, lithography processes are being developed to form minute patterns.
In lithography technology, photoresist may be applied to a semiconductor substrate, exposed to light of a desired wavelength through a patterned exposure mask, and developed to form the pattern. Controlling a critical dimension (CD) of a line width of a pattern is desired.
In the case of a pattern having a size of 1 μm or less, an exposure mask may be exposed to ultraviolet radiation through a reduction optical system while keeping a certain distance from the photoresist. There is interest in double patterning technology (DPT) to improve the resolution of the pattern formed on the photoresist.
In a spin-on side wall DPT process, the process includes forming a side wall spacer on a photoresist pattern.